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// Copyright (c) 2000-2008,  Elastos, Inc.  All Rights Reserved.
//==========================================================================
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// File: bulverde_def.h 							
//   Bulverde XScale(R) register location definitions 
//   Describes all registers mapped in the XScale Microarchitecture Processor. 							
//   (Note: Does not include Co-processer registers)							




		// DMA Control registers					
#define BV_DMA_BASE  	(volatile unsigned long *)( 0x40000000 )          // 	
#define BV_DCSR0		(volatile unsigned long *)( 0x40000000 )          // 	DMA Control / Status register for channel 0
#define BV_DCSR1		(volatile unsigned long *)( 0x40000004 )          // 	DMA Control / Status register for channel 1
#define BV_DCSR2		(volatile unsigned long *)( 0x40000008 )          // 	DMA Control / Status register for channel 2
#define BV_DCSR3		(volatile unsigned long *)( 0x4000000C )          // 	DMA Control / Status register for channel 3
#define BV_DCSR4		(volatile unsigned long *)( 0x40000010 )          // 	DMA Control / Status register for channel 4
#define BV_DCSR5		(volatile unsigned long *)( 0x40000014 )          // 	DMA Control / Status register for channel 5
#define BV_DCSR6		(volatile unsigned long *)( 0x40000018 )          // 	DMA Control / Status register for channel 6
#define BV_DCSR7		(volatile unsigned long *)( 0x4000001C )          // 	DMA Control / Status register for channel 7
#define BV_DCSR8		(volatile unsigned long *)( 0x40000020 )          // 	DMA Control / Status register for channel 8
#define BV_DCSR9		(volatile unsigned long *)( 0x40000024 )          // 	DMA Control / Status register for channel 9
#define BV_DCSR10		(volatile unsigned long *)( 0x40000028 )          // 	DMA Control / Status register for channel 10
#define BV_DCSR11		(volatile unsigned long *)( 0x4000002C )          // 	DMA Control / Status register for channel 11
#define BV_DCSR12		(volatile unsigned long *)( 0x40000030 )          // 	DMA Control / Status register for channel 12
#define BV_DCSR13		(volatile unsigned long *)( 0x40000034 )          // 	DMA Control / Status register for channel 13
#define BV_DCSR14		(volatile unsigned long *)( 0x40000038 )          // 	DMA Control / Status register for channel 14
#define BV_DCSR15		(volatile unsigned long *)( 0x4000003C )          // 	DMA Control / Status register for channel 15
#define BV_DCSR16		(volatile unsigned long *)( 0x40000040 )          // 	DMA Control / Status register for channel 16
#define BV_DCSR17		(volatile unsigned long *)( 0x40000044 )          // 	DMA Control / Status register for channel 17
#define BV_DCSR18		(volatile unsigned long *)( 0x40000048 )          // 	DMA Control / Status register for channel 18
#define BV_DCSR19		(volatile unsigned long *)( 0x4000004C )          // 	DMA Control / Status register for channel 19
#define BV_DCSR20		(volatile unsigned long *)( 0x40000050 )          // 	DMA Control / Status register for channel 20
#define BV_DCSR21		(volatile unsigned long *)( 0x40000054 )          // 	DMA Control / Status register for channel 21
#define BV_DCSR22		(volatile unsigned long *)( 0x40000058 )          // 	DMA Control / Status register for channel 22
#define BV_DCSR23		(volatile unsigned long *)( 0x4000005C )          // 	DMA Control / Status register for channel 23
#define BV_DCSR24		(volatile unsigned long *)( 0x40000060 )          // 	DMA Control / Status register for channel 24
#define BV_DCSR25		(volatile unsigned long *)( 0x40000064 )          // 	DMA Control / Status register for channel 25
#define BV_DCSR26		(volatile unsigned long *)( 0x40000068 )          // 	DMA Control / Status register for channel 26
#define BV_DCSR27		(volatile unsigned long *)( 0x4000006C )          // 	DMA Control / Status register for channel 27
#define BV_DCSR28		(volatile unsigned long *)( 0x40000070 )          // 	DMA Control / Status register for channel 28
#define BV_DCSR29		(volatile unsigned long *)( 0x40000074 )          // 	DMA Control / Status register for channel 29
#define BV_DCSR30		(volatile unsigned long *)( 0x40000078 )          // 	DMA Control / Status register for channel 30    
#define BV_DCSR31		(volatile unsigned long *)( 0x4000007C )          // 	DMA Control / Status register for channel 31    
#define BV_DALGN		(volatile unsigned long *)( 0x400000A0 )          // 	DMA alignment register         
#define BV_DRQSR0		(volatile unsigned long *)( 0x400000E0 )          // 	DMA DREQ(0) status register        
#define BV_DRQSR1		(volatile unsigned long *)( 0x400000E4 )          // 	DMA DREQ(1) status register        
#define BV_DINT			(volatile unsigned long *)( 0x400000F0 )          // 	DMA Interrupt register         
#define BV_DRCMR0		(volatile unsigned long *)( 0x40000100 )          // 	Request to Channel Map register for DREQ 0 (companion chip request 0)
#define BV_DRCMR1		(volatile unsigned long *)( 0x40000104 )          // 	Request to Channel Map register for DREQ 1 (companion chip request 1)
#define BV_DRCMR2		(volatile unsigned long *)( 0x40000108 )          // 	Request to Channel Map register for I2S receive Request   
#define BV_DRCMR3		(volatile unsigned long *)( 0x4000010C )          // 	Request to Channel Map register for I2S transmit Request   
#define BV_DRCMR4		(volatile unsigned long *)( 0x40000110 )          // 	Request to Channel Map register for BTUART receive Request   
#define BV_DRCMR5		(volatile unsigned long *)( 0x40000114 )          // 	Request to Channel Map register for BTUART transmit Request.   
#define BV_DRCMR6		(volatile unsigned long *)( 0x40000118 )          // 	Request to Channel Map register for FFUART receive Request   
#define BV_DRCMR7		(volatile unsigned long *)( 0x4000011C )          // 	Request to Channel Map register for FFUART transmit Request   
#define BV_DRCMR8		(volatile unsigned long *)( 0x40000120 )          // 	Request to Channel Map register for AC97 microphone Request   
#define BV_DRCMR9		(volatile unsigned long *)( 0x40000124 )          // 	Request to Channel Map register for AC97 modem receive Request  
#define BV_DRCMR10		(volatile unsigned long *)( 0x40000128 )          // 	Request to Channel Map register for AC97 modem transmit Request
#define BV_DRCMR11		(volatile unsigned long *)( 0x4000012C )          // 	Request to Channel Map register for AC97 audio receive Request
#define BV_DRCMR12		(volatile unsigned long *)( 0x40000130 )          // 	Request to Channel Map register for AC97 audio transmit Request
#define BV_DRCMR13		(volatile unsigned long *)( 0x40000134 )          // 	Request to Channel Map register for SSP1 receive Request 
#define BV_DRCMR14		(volatile unsigned long *)( 0x40000138 )          // 	Request to Channel Map register for SSP1 transmit Request 
#define BV_DRCMR15		(volatile unsigned long *)( 0x4000013C )          // 	Request to Channel Map register for SSP2 receive Request 
#define BV_DRCMR16		(volatile unsigned long *)( 0x40000140 )          // 	Request to Channel Map register for SSP2 transmit Request 
#define BV_DRCMR17		(volatile unsigned long *)( 0x40000144 )          // 	Request to Channel Map register for ICP receive Request 
#define BV_DRCMR18		(volatile unsigned long *)( 0x40000148 )          // 	Request to Channel Map register for ICP transmit Request 
#define BV_DRCMR19		(volatile unsigned long *)( 0x4000014C )          // 	Request to Channel Map register for STUART receive Request 
#define BV_DRCMR20		(volatile unsigned long *)( 0x40000150 )          // 	Request to Channel Map register for STUART transmit Request 
#define BV_DRCMR21		(volatile unsigned long *)( 0x40000154 )          // 	Request to Channel Map register for MMC receive Request 
#define BV_DRCMR22		(volatile unsigned long *)( 0x40000158 )          // 	Request to Channel Map register for MMC transmit Request 
#define BV_DRCMR23		(volatile unsigned long *)( 0x4000015C )          // 	RESERVED         
#define BV_DRCMR24		(volatile unsigned long *)( 0x40000160 )          // 	Request to Channel Map register for UDC endpoint 0 Request
#define BV_DRCMR25		(volatile unsigned long *)( 0x40000164 )          // 	Request to Channel Map register for UDC endpoint A Request
#define BV_DRCMR26		(volatile unsigned long *)( 0x40000168 )          // 	Request to Channel Map register for UDC endpoint B Request
#define BV_DRCMR27		(volatile unsigned long *)( 0x4000016C )          // 	Request to Channel Map register for UDC endpoint C Request
#define BV_DRCMR28		(volatile unsigned long *)( 0x40000170 )          // 	Request to Channel Map register for UDC endpoint D Request
#define BV_DRCMR29		(volatile unsigned long *)( 0x40000174 )          // 	Request to Channel Map register for UDC endpoint E Request
#define BV_DRCMR30		(volatile unsigned long *)( 0x40000178 )          // 	Request to Channel Map register for UDC endpoint F Request
#define BV_DRCMR31		(volatile unsigned long *)( 0x4000017C )          // 	Request to Channel Map register for UDC endpoint G Request
#define BV_DRCMR32		(volatile unsigned long *)( 0x40000180 )          // 	Request to Channel Map register for UDC endpoint H Request
#define BV_DRCMR33		(volatile unsigned long *)( 0x40000184 )          // 	Request to Channel Map register for UDC endpoint I Request
#define BV_DRCMR34		(volatile unsigned long *)( 0x40000188 )          // 	Request to Channel Map register for UDC endpoint J Request
#define BV_DRCMR35		(volatile unsigned long *)( 0x4000018C )          // 	Request to Channel Map register for UDC endpoint K Request
#define BV_DRCMR36		(volatile unsigned long *)( 0x40000190 )          // 	Request to Channel Map register for UDC endpoint L Request
#define BV_DRCMR37		(volatile unsigned long *)( 0x40000194 )          // 	Request to Channel Map register for UDC endpoint M Request
#define BV_DRCMR38		(volatile unsigned long *)( 0x40000198 )          // 	Request to Channel Map register for UDC endpoint N Request
#define BV_DRCMR39		(volatile unsigned long *)( 0x4000019C )          // 	Request to Channel Map register for UDC endpoint P Request
#define BV_DRCMR40		(volatile unsigned long *)( 0x400001A0 )          // 	Request to Channel Map register for UDC endpoint Q Request
#define BV_DRCMR41		(volatile unsigned long *)( 0x400001A4 )          // 	Request to Channel Map register for UDC endpoint R Request
#define BV_DRCMR42		(volatile unsigned long *)( 0x400001A8 )          // 	Request to Channel Map register for UDC endpoint S Request
#define BV_DRCMR43		(volatile unsigned long *)( 0x400001AC )          // 	Request to Channel Map register for UDC endpoint T Request
#define BV_DRCMR44		(volatile unsigned long *)( 0x400001B0 )          // 	Request to Channel Map register for UDC endpoint U Request
#define BV_DRCMR45		(volatile unsigned long *)( 0x400001B4 )          // 	Request to Channel Map register for UDC endpoint V Request
#define BV_DRCMR46		(volatile unsigned long *)( 0x400001B8 )          // 	Request to Channel Map register for UDC endpoint W Request
#define BV_DRCMR47		(volatile unsigned long *)( 0x400001BC )          // 	Request to Channel Map register for UDC endpoint X Request
#define BV_DRCMR48		(volatile unsigned long *)( 0x400001C0 )          // 	Request to Channel Map register for Baseband receive request 1
#define BV_DRCMR49		(volatile unsigned long *)( 0x400001C4 )          // 	Request to Channel Map register for Baseband transmit request 1
#define BV_DRCMR50		(volatile unsigned long *)( 0x400001C8 )          // 	Request to Channel Map register for Baseband receive request 2
#define BV_DRCMR51		(volatile unsigned long *)( 0x400001CC )          // 	Request to Channel Map register for Baseband transmit request 2
#define BV_DRCMR52		(volatile unsigned long *)( 0x400001D0 )          // 	Request to Channel Map register for Baseband receive request 3
#define BV_DRCMR53		(volatile unsigned long *)( 0x400001D4 )          // 	Request to Channel Map register for Baseband transmit request 3
#define BV_DRCMR54		(volatile unsigned long *)( 0x400001D8 )          // 	Request to Channel Map register for Baseband receive request 4
#define BV_DRCMR55		(volatile unsigned long *)( 0x400001DC )          // 	Request to Channel Map register for Baseband transmit request 4
#define BV_DRCMR56		(volatile unsigned long *)( 0x400001E0 )          // 	Request to Channel Map register for Baseband receive request 5
#define BV_DRCMR57		(volatile unsigned long *)( 0x400001E4 )          // 	Request to Channel Map register for Baseband transmit request 5
#define BV_DRCMR58		(volatile unsigned long *)( 0x400001E8 )          // 	Request to Channel Map register for Baseband receive request 6
#define BV_DRCMR59		(volatile unsigned long *)( 0x400001EC )          // 	Request to Channel Map register for Baseband transmit request 6
#define BV_DRCMR60		(volatile unsigned long *)( 0x400001F0 )          // 	Request to Channel Map register for Baseband receive request 7
#define BV_DRCMR61		(volatile unsigned long *)( 0x400001F4 )          // 	Request to Channel Map register for Baseband receive request 7
#define BV_DRCMR62		(volatile unsigned long *)( 0x400001F8 )          // 	Request to Channel Map register for USIM receive request 
#define BV_DRCMR63		(volatile unsigned long *)( 0x400001FC )          // 	Request to Channel Map register for USIM transmit request 
#define BV_DDADR0		(volatile unsigned long *)( 0x40000200 )          // 	DMA Descriptor Address register channel 0    
#define BV_DSADR0		(volatile unsigned long *)( 0x40000204 )          // 	DMA Source Address register channel 0    
#define BV_DTADR0		(volatile unsigned long *)( 0x40000208 )          // 	DMA Target Address register channel 0    
#define BV_DCMD0		(volatile unsigned long *)( 0x4000020C )          // 	DMA Command Address register channel 0    
#define BV_DDADR1		(volatile unsigned long *)( 0x40000210 )          // 	DMA Descriptor Address register channel 1    
#define BV_DSADR1		(volatile unsigned long *)( 0x40000214 )          // 	DMA Source Address register channel 1    
#define BV_DTADR1		(volatile unsigned long *)( 0x40000218 )          // 	DMA Target Address register channel 1    
#define BV_DCMD1		(volatile unsigned long *)( 0x4000021C )          // 	DMA Command Address register channel 1    
#define BV_DDADR2		(volatile unsigned long *)( 0x40000220 )          // 	DMA Descriptor Address register channel 2    
#define BV_DSADR2		(volatile unsigned long *)( 0x40000224 )          // 	DMA Source Address register channel 2    
#define BV_DTADR2		(volatile unsigned long *)( 0x40000228 )          // 	DMA Target Address register channel 2
#define BV_DCMD2		(volatile unsigned long *)( 0x4000022C )          // 	DMA Command Address register channel 2
#define BV_DDADR3		(volatile unsigned long *)( 0x40000230 )          // 	DMA Descriptor Address register channel 3
#define BV_DSADR3		(volatile unsigned long *)( 0x40000234 )          // 	DMA Source Address register channel 3
#define BV_DTADR3		(volatile unsigned long *)( 0x40000238 )          // 	DMA Target Address register channel 3
#define BV_DCMD3		(volatile unsigned long *)( 0x4000023C )          // 	DMA Command Address register channel 3
#define BV_DDADR4		(volatile unsigned long *)( 0x40000240 )          // 	DMA Descriptor Address register channel 4
#define BV_DSADR4		(volatile unsigned long *)( 0x40000244 )          // 	DMA Source Address register channel 4
#define BV_DTADR4		(volatile unsigned long *)( 0x40000248 )          // 	DMA Target Address register channel 4
#define BV_DCMD4		(volatile unsigned long *)( 0x4000024C )          // 	DMA Command Address register channel 4
#define BV_DDADR5		(volatile unsigned long *)( 0x40000250 )          // 	DMA Descriptor Address register channel 5
#define BV_DSADR5		(volatile unsigned long *)( 0x40000254 )          // 	DMA Source Address register channel 5
#define BV_DTADR5		(volatile unsigned long *)( 0x40000258 )          // 	DMA Target Address register channel 5
#define BV_DCMD5		(volatile unsigned long *)( 0x4000025C )          // 	DMA Command Address register channel 5
#define BV_DDADR6		(volatile unsigned long *)( 0x40000260 )          // 	DMA Descriptor Address register channel 6
#define BV_DSADR6		(volatile unsigned long *)( 0x40000264 )          // 	DMA Source Address register channel 6
#define BV_DTADR6		(volatile unsigned long *)( 0x40000268 )          // 	DMA Target Address register channel 6
#define BV_DCMD6		(volatile unsigned long *)( 0x4000026C )          // 	DMA Command Address register channel 6
#define BV_DDADR7		(volatile unsigned long *)( 0x40000270 )          // 	DMA Descriptor Address register channel 7
#define BV_DSADR7		(volatile unsigned long *)( 0x40000274 )          // 	DMA Source Address register channel 7
#define BV_DTADR7		(volatile unsigned long *)( 0x40000278 )          // 	DMA Target Address register channel 7
#define BV_DCMD7		(volatile unsigned long *)( 0x4000027C )          // 	DMA Command Address register channel 7
#define BV_DDADR8		(volatile unsigned long *)( 0x40000280 )          // 	DMA Descriptor Address register channel 8
#define BV_DSADR8		(volatile unsigned long *)( 0x40000284 )          // 	DMA Source Address register channel 8
#define BV_DTADR8		(volatile unsigned long *)( 0x40000288 )          // 	DMA Target Address register channel 8
#define BV_DCMD8		(volatile unsigned long *)( 0x4000028C )          // 	DMA Command Address register channel 8
#define BV_DDADR9		(volatile unsigned long *)( 0x40000290 )          // 	DMA Descriptor Address register channel 9
#define BV_DSADR9		(volatile unsigned long *)( 0x40000294 )          // 	DMA Source Address register channel 9
#define BV_DTADR9		(volatile unsigned long *)( 0x40000298 )          // 	DMA Target Address register channel 9
#define BV_DCMD9		(volatile unsigned long *)( 0x4000029C )          // 	DMA Command Address register channel 9
#define BV_DDADR10		(volatile unsigned long *)( 0x400002A0 )          // 	DMA Descriptor Address register channel 10
#define BV_DSADR10		(volatile unsigned long *)( 0x400002A4 )          // 	DMA Source Address register channel 10
#define BV_DTADR10		(volatile unsigned long *)( 0x400002A8 )          // 	DMA Target Address register channel 10
#define BV_DCMD10		(volatile unsigned long *)( 0x400002AC )          // 	DMA Command Address register channel 10
#define BV_DDADR11		(volatile unsigned long *)( 0x400002B0 )          // 	DMA Descriptor Address register channel 11
#define BV_DSADR11		(volatile unsigned long *)( 0x400002B4 )          // 	DMA Source Address register channel 11
#define BV_DTADR11		(volatile unsigned long *)( 0x400002B8 )          // 	DMA Target Address register channel 11
#define BV_DCMD11		(volatile unsigned long *)( 0x400002BC )          // 	DMA Command Address register channel 11
#define BV_DDADR12		(volatile unsigned long *)( 0x400002C0 )          // 	DMA Descriptor Address register channel 12
#define BV_DSADR12		(volatile unsigned long *)( 0x400002C4 )          // 	DMA Source Address register channel 12
#define BV_DTADR12		(volatile unsigned long *)( 0x400002C8 )          // 	DMA Target Address register channel 12
#define BV_DCMD12		(volatile unsigned long *)( 0x400002CC )          // 	DMA Command Address register channel 12
#define BV_DDADR13		(volatile unsigned long *)( 0x400002D0 )          // 	DMA Descriptor Address register channel 13
#define BV_DSADR13		(volatile unsigned long *)( 0x400002D4 )          // 	DMA Source Address register channel 13
#define BV_DTADR13		(volatile unsigned long *)( 0x400002D8 )          // 	DMA Target Address register channel 13
#define BV_DCMD13		(volatile unsigned long *)( 0x400002DC )          // 	DMA Command Address register channel 13
#define BV_DDADR14		(volatile unsigned long *)( 0x400002E0 )          // 	DMA Descriptor Address register channel 14
#define BV_DSADR14		(volatile unsigned long *)( 0x400002E4 )          // 	DMA Source Address register channel 14
#define BV_DTADR14		(volatile unsigned long *)( 0x400002E8 )          // 	DMA Target Address register channel 14
#define BV_DCMD14		(volatile unsigned long *)( 0x400002EC )          // 	DMA Command Address register channel 14
#define BV_DDADR15		(volatile unsigned long *)( 0x400002F0 )          // 	DMA Descriptor Address register channel 15
#define BV_DSADR15		(volatile unsigned long *)( 0x400002F4 )          // 	DMA Source Address register channel 15
#define BV_DTADR15		(volatile unsigned long *)( 0x400002F8 )          // 	DMA Target Address register channel 15
#define BV_DCMD15		(volatile unsigned long *)( 0x400002FC )          // 	DMA Command Address register channel 15
#define BV_DDADR16		(volatile unsigned long *)( 0x40000300 )          // 	DMA Descriptor Address register channel 16
#define BV_DSADR16		(volatile unsigned long *)( 0x40000304 )          // 	DMA Source Address register channel 16
#define BV_DTADR16		(volatile unsigned long *)( 0x40000308 )          // 	DMA Target Address register channel 16
#define BV_DCMD16		(volatile unsigned long *)( 0x4000030C )          // 	DMA Command Address register channel 16
#define BV_DDADR17		(volatile unsigned long *)( 0x40000310 )          // 	DMA Descriptor Address register channel 17
#define BV_DSADR17		(volatile unsigned long *)( 0x40000314 )          // 	DMA Source Address register channel 17
#define BV_DTADR17		(volatile unsigned long *)( 0x40000318 )          // 	DMA Target Address register channel 17
#define BV_DCMD17		(volatile unsigned long *)( 0x4000031C )          // 	DMA Command Address register channel 17
#define BV_DDADR18		(volatile unsigned long *)( 0x40000320 )          // 	DMA Descriptor Address register channel 18
#define BV_DSADR18		(volatile unsigned long *)( 0x40000324 )          // 	DMA Source Address register channel 18
#define BV_DTADR18		(volatile unsigned long *)( 0x40000328 )          // 	DMA Target Address register channel 18
#define BV_DCMD18		(volatile unsigned long *)( 0x4000032C )          // 	DMA Command Address register channel 18
#define BV_DDADR19		(volatile unsigned long *)( 0x40000330 )          // 	DMA Descriptor Address register channel 19
#define BV_DSADR19		(volatile unsigned long *)( 0x40000334 )          // 	DMA Source Address register channel 19
#define BV_DTADR19		(volatile unsigned long *)( 0x40000338 )          // 	DMA Target Address register channel 19
#define BV_DCMD19		(volatile unsigned long *)( 0x4000033C )          // 	DMA Command Address register channel 19
#define BV_DSADR24		(volatile unsigned long *)( 0x4000034 )          // 	DMA Source Address register channel 24
#define BV_DDADR20		(volatile unsigned long *)( 0x40000340 )          // 	DMA Descriptor Address register channel 20
#define BV_DSADR20		(volatile unsigned long *)( 0x40000344 )          // 	DMA Source Address register channel 20
#define BV_DTADR20		(volatile unsigned long *)( 0x40000348 )          // 	DMA Target Address register channel 20
#define BV_DCMD20		(volatile unsigned long *)( 0x4000034C )          // 	DMA Command Address register channel 20
#define BV_DDADR21		(volatile unsigned long *)( 0x40000350 )          // 	DMA Descriptor Address register channel 21
#define BV_DSADR21		(volatile unsigned long *)( 0x40000354 )          // 	DMA Source Address register channel 21
#define BV_DTADR21		(volatile unsigned long *)( 0x40000358 )          // 	DMA Target Address register channel 21
#define BV_DCMD21		(volatile unsigned long *)( 0x4000035C )          // 	DMA Command Address register channel 21
#define BV_DDADR22		(volatile unsigned long *)( 0x40000360 )          // 	DMA Descriptor Address register channel 22
#define BV_DSADR22		(volatile unsigned long *)( 0x40000364 )          // 	DMA Source Address register channel 22
#define BV_DTADR22		(volatile unsigned long *)( 0x40000368 )          // 	DMA Target Address register channel 22
#define BV_DCMD22		(volatile unsigned long *)( 0x4000036C )          // 	DMA Command Address register channel 22
#define BV_DDADR23		(volatile unsigned long *)( 0x40000370 )          // 	DMA Descriptor Address register channel 23
#define BV_DSADR23		(volatile unsigned long *)( 0x40000374 )          // 	DMA Source Address register channel 23
#define BV_DTADR23		(volatile unsigned long *)( 0x40000378 )          // 	DMA Target Address register channel 23
#define BV_DCMD23		(volatile unsigned long *)( 0x4000037C )          // 	DMA Command Address register channel 23
#define BV_DDADR24		(volatile unsigned long *)( 0x40000380 )          // 	DMA Descriptor Address register channel 24
#define BV_DTADR24		(volatile unsigned long *)( 0x40000388 )          // 	DMA Target Address register channel 24
#define BV_DCMD24		(volatile unsigned long *)( 0x4000038C )          // 	DMA Command Address register channel 24
#define BV_DDADR25		(volatile unsigned long *)( 0x40000390 )          // 	DMA Descriptor Address register channel 25
#define BV_DSADR25		(volatile unsigned long *)( 0x40000394 )          // 	DMA Source Address register channel 25
#define BV_DTADR25		(volatile unsigned long *)( 0x40000398 )          // 	DMA Target Address register channel 25
#define BV_DCMD25		(volatile unsigned long *)( 0x4000039C )          // 	DMA Command Address register channel 25
#define BV_DDADR26		(volatile unsigned long *)( 0x400003A0 )          // 	DMA Descriptor Address register channel 26
#define BV_DSADR26		(volatile unsigned long *)( 0x400003A4 )          // 	DMA Source Address register channel 26
#define BV_DTADR26		(volatile unsigned long *)( 0x400003A8 )          // 	DMA Target Address register channel 26
#define BV_DCMD26		(volatile unsigned long *)( 0x400003AC )          // 	DMA Command Address register channel 26
#define BV_DDADR27		(volatile unsigned long *)( 0x400003B0 )          // 	DMA Descriptor Address register channel 27
#define BV_DSADR27		(volatile unsigned long *)( 0x400003B4 )          // 	DMA Source Address register channel 27
#define BV_DTADR27		(volatile unsigned long *)( 0x400003B8 )          // 	DMA Target Address register channel 27
#define BV_DCMD27		(volatile unsigned long *)( 0x400003BC )          // 	DMA Command Address register channel 27
#define BV_DDADR28		(volatile unsigned long *)( 0x400003C0 )          // 	DMA Descriptor Address register channel 28
#define BV_DSADR28		(volatile unsigned long *)( 0x400003C4 )          // 	DMA Source Address register channel 28
#define BV_DTADR28		(volatile unsigned long *)( 0x400003C8 )          // 	DMA Target Address register channel 28
#define BV_DCMD28		(volatile unsigned long *)( 0x400003CC )          // 	DMA Command Address register channel 28
#define BV_DDADR29		(volatile unsigned long *)( 0x400003D0 )          // 	DMA Descriptor Address register channel 29
#define BV_DSADR29		(volatile unsigned long *)( 0x400003D4 )          // 	DMA Source Address register channel 29
#define BV_DTADR29		(volatile unsigned long *)( 0x400003D8 )          // 	DMA Target Address register channel 29
#define BV_DCMD29		(volatile unsigned long *)( 0x400003DC )          // 	DMA Command Address register channel 29
#define BV_DDADR30		(volatile unsigned long *)( 0x400003E0 )          // 	DMA Descriptor Address register channel 30
#define BV_DSADR30		(volatile unsigned long *)( 0x400003E4 )          // 	DMA Source Address register channel 30
#define BV_DTADR30		(volatile unsigned long *)( 0x400003E8 )          // 	DMA Target Address register channel 30    
#define BV_DCMD30		(volatile unsigned long *)( 0x400003EC )          // 	DMA Command Address register channel 30    
#define BV_DDADR31		(volatile unsigned long *)( 0x400003F0 )          // 	DMA Descriptor Address register channel 31    
#define BV_DSADR31		(volatile unsigned long *)( 0x400003F4 )          // 	DMA Source Address register channel 31    
#define BV_DTADR31		(volatile unsigned long *)( 0x400003F8 )          // 	DMA Target Address register channel 31    
#define BV_DCMD31		(volatile unsigned long *)( 0x400003FC )          // 	DMA Command Address register channel 31    
#define BV_DRCMR64		(volatile unsigned long *)( 0x40001100 )          // 	Request to Channel Map register for Memory Stick receive Request
#define BV_DRCMR65		(volatile unsigned long *)( 0x40001104 )          // 	Request to Channel Map register for Memory Stick transmit Request
#define BV_DRCMR66		(volatile unsigned long *)( 0x40001108 )          // 	Request to Channel Map register for SSP3 receive Request 
#define BV_DRCMR67		(volatile unsigned long *)( 0x4000110C )          // 	Request to Channel Map register for SSP3 transmit Request 
 // _FFUART control register					
#define BV_FF_BASE		(volatile unsigned long *)( 0x40100000 )          // 	
#define BV_FF_DLL		(volatile unsigned long *)( 0x40100000 )          // 	Divisor Latch Reg. low byte(read/write)  
#define BV_FF_RBR		(volatile unsigned long *)( 0x40100000 )          // 	Receive Buffer register (read only)  
#define BV_FF_THR		(volatile unsigned long *)( 0x40100000 )          // 	Transmit Holding register (write only)  
#define BV_FF_DLH		(volatile unsigned long *)( 0x40100004 )          // 	Divisor Latch Reg. high byte(read/write)  
#define BV_FF_IER		(volatile unsigned long *)( 0x40100004 )          // 	Interrupt Enable register (read/write)   
#define BV_FF_FCR		(volatile unsigned long *)( 0x40100008 )          // 	FIFO Control register (write only)  
#define BV_FF_IIR		(volatile unsigned long *)( 0x40100008 )          // 	Interrupt ID register (read only)  
#define BV_FF_LCR		(volatile unsigned long *)( 0x4010000C )          // 	Line Control register (read/write)   
#define BV_FF_MCR		(volatile unsigned long *)( 0x40100010 )          // 	Modem Control register (read/write)   
#define BV_FF_LSR		(volatile unsigned long *)( 0x40100014 )          // 	Line Status register (read only)  
#define BV_FF_MSR		(volatile unsigned long *)( 0x40100018 )          // 	Modem Status register (read only)  
#define BV_FF_SPR		(volatile unsigned long *)( 0x4010001C )          // 	Scratch Pad register (read/write)   
#define BV_FF_ISR		(volatile unsigned long *)( 0x40100020 )          // 	Slow Infrared Select register (read/write)  
#define BV_FF_FOR		(volatile unsigned long *)( 0x40100024 )          // 	FIFO Occupancy register (read only)  
#define BV_FF_ABR		(volatile unsigned long *)( 0x40100028 )          // 	Autobaud Control register (read/write)   
#define BV_FF_ACR		(volatile unsigned long *)( 0x4010002C )          // 	Autobaud Count register    
 // BTUART control registers					
#define BV_BT_BASE		(volatile unsigned long *)( 0x40200000 )          // 	
#define BV_BT_DLL		(volatile unsigned long *)( 0x40200000 )          // 	Divisor Latch Reg. low byte(read/write)             
#define BV_BT_RBR		(volatile unsigned long *)( 0x40200000 )          // 	Receive Buffer register (read only)
#define BV_BT_THR		(volatile unsigned long *)( 0x40200000 )          // 	Transmit Holding register (write only)
#define BV_BT_DLH		(volatile unsigned long *)( 0x40200004 )          // 	Divisor Latch Reg. high byte (read/write)            
#define BV_BT_IER		(volatile unsigned long *)( 0x40200004 )          // 	Interrupt Enable register (read/write)              
#define BV_BT_FCR		(volatile unsigned long *)( 0x40200008 )          // 	FIFO Control register (write only)             
#define BV_BT_IIR		(volatile unsigned long *)( 0x40200008 )          // 	Interrupt ID register (read only)             
#define BV_BT_LCR		(volatile unsigned long *)( 0x4020000C )          // 	Line Control register (read/write) 
#define BV_BT_MCR		(volatile unsigned long *)( 0x40200010 )          // 	Modem Control register (read/write) 
#define BV_BT_LSR		(volatile unsigned long *)( 0x40200014 )          // 	Line Status register (read only)
#define BV_BT_MSR		(volatile unsigned long *)( 0x40200018 )          // 	Modem Status register (read only)
#define BV_BT_SPR		(volatile unsigned long *)( 0x4020001C )          // 	Scratch Pad register (read/write) 
#define BV_BT_ISR		(volatile unsigned long *)( 0x40200020 )          // 	Slow Infrared Select register (read/write)             
#define BV_BT_FOR		(volatile unsigned long *)( 0x40200024 )          // 	FIFO Occupancy register (read only)             
#define BV_BT_ABR		(volatile unsigned long *)( 0x40200028 )          // 	Autobaud Control register (read/write)              
#define BV_BT_ACR		(volatile unsigned long *)( 0x4020002C )          // 	Autobaud Count register               
 // I2C control registers					
#define BV_I2C_BASE   	(volatile unsigned long *)( 0x40300000 )          // 	
#define BV_IBMR			(volatile unsigned long *)( 0x40301680 )          // 	Bus Monitor register   
#define BV_IDBR			(volatile unsigned long *)( 0x40301688 )          // 	Data Buffer register        
#define BV_ICR			(volatile unsigned long *)( 0x40301690 )          // 	Control register         
#define BV_ISR			(volatile unsigned long *)( 0x40301698 )          // 	Status register       
#define BV_ISAR			(volatile unsigned long *)( 0x403016A0 )          // 	Slave Address register        
 // I2S control registers					
#define BV_I2S_BASE   	(volatile unsigned long *)( 0x40400000 )          // 	
#define BV_SACR0		(volatile unsigned long *)( 0x40400000 )          // 	Global Control register             
#define BV_SACR1		(volatile unsigned long *)( 0x40400004 )          // 	Serial Audio I2S/MSB-Justified Control register           
#define BV_SASR0		(volatile unsigned long *)( 0x4040000C )          // 	Serial Audio I2S/MSB-Justified Interface and FIFO Status register        
#define BV_SAIMR		(volatile unsigned long *)( 0x40400014 )          // 	Serial Audio Interrupt Mask register           
#define BV_SAICR		(volatile unsigned long *)( 0x40400018 )          // 	Serial Audio Interrupt Clear register           
#define BV_SADIV		(volatile unsigned long *)( 0x40400060 )          // 	Audio clock divider register. See section 22.3 Serial Audio Clocks and Sampling frequencies on page 22-7.
#define BV_SADR			(volatile unsigned long *)( 0x40400080 )          // 	Serial Audio Data Register (TX and RX FIFO access register).      
 // AC97 control registers					
#define BV_AC97_BASE  	(volatile unsigned long *)( 0x40500000 )          // 	
#define BV_POCR			(volatile unsigned long *)( 0x40500000 )          // 	PCM Out Control register   
#define BV_PCMICR   	(volatile unsigned long *)( 0x40500004 )          // 	PCM In Control register  
#define BV_MCCR			(volatile unsigned long *)( 0x40500008 )          // 	Mic In Control register      
#define BV_GCR			(volatile unsigned long *)( 0x4050000C )          // 	Global Control register    
#define BV_POSR			(volatile unsigned long *)( 0x40500010 )          // 	PCM Out Status register   
#define BV_PCMISR 		(volatile unsigned long *)( 0x40500014 )          // 	PCM In Status register  
#define BV_MCSR			(volatile unsigned long *)( 0x40500018 )          // 	Mic In Status register      
#define BV_GSR			(volatile unsigned long *)( 0x4050001C )          // 	Global Status register   
#define BV_CAR			(volatile unsigned long *)( 0x40500020 )          // 	CODEC Access register  
#define BV_PCDR			(volatile unsigned long *)( 0x40500040 )          // 	PCM FIFO Data register    
#define BV_MCDR			(volatile unsigned long *)( 0x40500060 )          // 	Mic-in FIFO Data register      
 // Modem Domain Registers					
#define BV_MOCR			(volatile unsigned long *)( 0x40500100 )          // 	Modem Out Control register   
#define BV_MICR			(volatile unsigned long *)( 0x40500108 )          // 	Modem In Control register      
#define BV_MOSR			(volatile unsigned long *)( 0x40500110 )          // 	Modem Out Status register   
#define BV_MISR			(volatile unsigned long *)( 0x40500118 )          // 	Modem In Status register      
#define BV_MODR			(volatile unsigned long *)( 0x40500140 )          // 	Modem FIFO Data register   
 // UDC Control Registers					
#define BV_UDC_BASE    	(volatile unsigned long *)( 0x40600000 )          // 	
#define BV_UDCCR		(volatile unsigned long *)( 0x40600000 )          // 	UDC Control register    
#define BV_UDCICR0		(volatile unsigned long *)( 0x40600004 )          // 	UDC Interrupt Control register 0 
#define BV_UDCICR1		(volatile unsigned long *)( 0x40600008 )          // 	UDC Interrupt Control register 1 
#define BV_UDCISR0		(volatile unsigned long *)( 0x4060000C )          // 	UDC Interrupt Status register 0 
#define BV_UDCISR1		(volatile unsigned long *)( 0x40600010 )          // 	UDC Interrupt Status register 1 
#define BV_UDCFNR		(volatile unsigned long *)( 0x40600014 )          // 	UDC Frame Number register  
#define BV_UDCCSR0		(volatile unsigned long *)( 0x40600100 )          // 	UDC Control/Status register - Endpoint 0
#define BV_UDCCSRA		(volatile unsigned long *)( 0x40600104 )          // 	UDC Control/Status register - Endpoint A
#define BV_UDCCSRB		(volatile unsigned long *)( 0x40600108 )          // 	UDC Control/Status register - Endpoint B
#define BV_UDCCSRC		(volatile unsigned long *)( 0x4060010C )          // 	UDC Control/Status register - Endpoint C
#define BV_UDCCSRD		(volatile unsigned long *)( 0x40600110 )          // 	UDC Control/Status register - Endpoint D
#define BV_UDCCSRE		(volatile unsigned long *)( 0x40600114 )          // 	UDC Control/Status register - Endpoint E
#define BV_UDCCSRF		(volatile unsigned long *)( 0x40600118 )          // 	UDC Control/Status register - Endpoint F
#define BV_UDCCSRG		(volatile unsigned long *)( 0x4060011C )          // 	UDC Control/Status register - Endpoint G
#define BV_UDCCSRH		(volatile unsigned long *)( 0x40600120 )          // 	UDC Control/Status register - Endpoint H
#define BV_UDCCSRI		(volatile unsigned long *)( 0x40600124 )          // 	UDC Control/Status register - Endpoint I
#define BV_UDCCSRJ		(volatile unsigned long *)( 0x40600128 )          // 	UDC Control/Status register - Endpoint J
#define BV_UDCCSRK		(volatile unsigned long *)( 0x4060012C )          // 	UDC Control/Status register - Endpoint K
#define BV_UDCCSRL		(volatile unsigned long *)( 0x40600130 )          // 	UDC Control/Status register - Endpoint L
#define BV_UDCCSRM		(volatile unsigned long *)( 0x40600134 )          // 	UDC Control/Status register - Endpoint M
#define BV_UDCCSRN		(volatile unsigned long *)( 0x40600138 )          // 	UDC Control/Status register - Endpoint N
#define BV_UDCCSRP		(volatile unsigned long *)( 0x4060013C )          // 	UDC Control/Status register - Endpoint P
#define BV_UDCCSRQ		(volatile unsigned long *)( 0x40600140 )          // 	UDC Control/Status register - Endpoint Q
#define BV_UDCCSRR		(volatile unsigned long *)( 0x40600144 )          // 	UDC Control/Status register - Endpoint R
#define BV_UDCCSRS		(volatile unsigned long *)( 0x40600148 )          // 	UDC Control/Status register - Endpoint S
#define BV_UDCCSRT		(volatile unsigned long *)( 0x4060014C )          // 	UDC Control/Status register - Endpoint T
#define BV_UDCCSRU		(volatile unsigned long *)( 0x40600150 )          // 	UDC Control/Status register - Endpoint U
#define BV_UDCCSRV		(volatile unsigned long *)( 0x40600154 )          // 	UDC Control/Status register - Endpoint V
#define BV_UDCCSRW		(volatile unsigned long *)( 0x40600158 )          // 	UDC Control/Status register - Endpoint W
#define BV_UDCCSRX		(volatile unsigned long *)( 0x4060015C )          // 	UDC Control/Status register - Endpoint X
#define BV_UDCBCR0		(volatile unsigned long *)( 0x40600200 )          // 	UDC Byte Count register - Endpoint 0
#define BV_UDCBCRA		(volatile unsigned long *)( 0x40600204 )          // 	UDC Byte Count register - Endpoint A
#define BV_UDCBCRB		(volatile unsigned long *)( 0x40600208 )          // 	UDC Byte Count register - Endpoint B
#define BV_UDCBCRC		(volatile unsigned long *)( 0x4060020C )          // 	UDC Byte Count register - Endpoint C
#define BV_UDCBCRD		(volatile unsigned long *)( 0x40600210 )          // 	UDC Byte Count register - Endpoint D
#define BV_UDCBCRE		(volatile unsigned long *)( 0x40600214 )          // 	UDC Byte Count register - Endpoint E
#define BV_UDCBCRF		(volatile unsigned long *)( 0x40600218 )          // 	UDC Byte Count register - Endpoint F
#define BV_UDCBCRG		(volatile unsigned long *)( 0x4060021C )          // 	UDC Byte Count register - Endpoint G
#define BV_UDCBCRH		(volatile unsigned long *)( 0x40600220 )          // 	UDC Byte Count register - Endpoint H
#define BV_UDCBCRI		(volatile unsigned long *)( 0x40600224 )          // 	UDC Byte Count register - Endpoint I
#define BV_UDCBCRJ		(volatile unsigned long *)( 0x40600228 )          // 	UDC Byte Count register - Endpoint J
#define BV_UDCBCRK		(volatile unsigned long *)( 0x4060022C )          // 	UDC Byte Count register - Endpoint K
#define BV_UDCBCRL		(volatile unsigned long *)( 0x40600230 )          // 	UDC Byte Count register - Endpoint L
#define BV_UDCBCRM		(volatile unsigned long *)( 0x40600234 )          // 	UDC Byte Count register - Endpoint M
#define BV_UDCBCRN		(volatile unsigned long *)( 0x40600238 )          // 	UDC Byte Count register - Endpoint N
#define BV_UDCBCRP		(volatile unsigned long *)( 0x4060023C )          // 	UDC Byte Count register - Endpoint P
#define BV_UDCBCRQ		(volatile unsigned long *)( 0x40600240 )          // 	UDC Byte Count register - Endpoint Q
#define BV_UDCBCRR		(volatile unsigned long *)( 0x40600244 )          // 	UDC Byte Count register - Endpoint R
#define BV_UDCBCRS		(volatile unsigned long *)( 0x40600248 )          // 	UDC Byte Count register - Endpoint S
#define BV_UDCBCRT		(volatile unsigned long *)( 0x4060024C )          // 	UDC Byte Count register - Endpoint T
#define BV_UDCBCRU		(volatile unsigned long *)( 0x40600250 )          // 	UDC Byte Count register - Endpoint U
#define BV_UDCBCRV		(volatile unsigned long *)( 0x40600254 )          // 	UDC Byte Count register - Endpoint V
#define BV_UDCBCRW		(volatile unsigned long *)( 0x40600258 )          // 	UDC Byte Count register - Endpoint W
#define BV_UDCBCRX		(volatile unsigned long *)( 0x4060025C )          // 	UDC Byte Count register - Endpoint X
#define BV_UDCDR0		(volatile unsigned long *)( 0x40600300 )          // 	UDC Data register - Endpoint 0
#define BV_UDCDRA		(volatile unsigned long *)( 0x40600304 )          // 	UDC Data register - Endpoint A
#define BV_UDCDRB		(volatile unsigned long *)( 0x40600308 )          // 	UDC Data register - Endpoint B
#define BV_UDCDRC		(volatile unsigned long *)( 0x4060030C )          // 	UDC Data register - Endpoint C
#define BV_UDCDRD		(volatile unsigned long *)( 0x40600310 )          // 	UDC Data register - Endpoint D
#define BV_UDCDRE		(volatile unsigned long *)( 0x40600314 )          // 	UDC Data register - Endpoint E
#define BV_UDCDRF		(volatile unsigned long *)( 0x40600318 )          // 	UDC Data register - Endpoint F
#define BV_UDCDRG		(volatile unsigned long *)( 0x4060031C )          // 	UDC Data register - Endpoint G
#define BV_UDCDRH		(volatile unsigned long *)( 0x40600320 )          // 	UDC Data register - Endpoint H
#define BV_UDCDRI		(volatile unsigned long *)( 0x40600324 )          // 	UDC Data register - Endpoint I
#define BV_UDCDRJ		(volatile unsigned long *)( 0x40600328 )          // 	UDC Data register - Endpoint J
#define BV_UDCDRK		(volatile unsigned long *)( 0x4060032C )          // 	UDC Data register - Endpoint K
#define BV_UDCDRL		(volatile unsigned long *)( 0x40600330 )          // 	UDC Data register - Endpoint L
#define BV_UDCDRM		(volatile unsigned long *)( 0x40600334 )          // 	UDC Data register - Endpoint M
#define BV_UDCDRN		(volatile unsigned long *)( 0x40600338 )          // 	UDC Data register - Endpoint N
#define BV_UDCDRP		(volatile unsigned long *)( 0x4060033C )          // 	UDC Data register - Endpoint P
#define BV_UDCDRQ		(volatile unsigned long *)( 0x40600340 )          // 	UDC Data register - Endpoint Q
#define BV_UDCDRR		(volatile unsigned long *)( 0x40600344 )          // 	UDC Data register - Endpoint R
#define BV_UDCDRS		(volatile unsigned long *)( 0x40600348 )          // 	UDC Data register - Endpoint S
#define BV_UDCDRT		(volatile unsigned long *)( 0x4060034C )          // 	UDC Data register - Endpoint T
#define BV_UDCDRU		(volatile unsigned long *)( 0x40600350 )          // 	UDC Data register - Endpoint U
#define BV_UDCDRV		(volatile unsigned long *)( 0x40600354 )          // 	UDC Data register - Endpoint V
#define BV_UDCDRW		(volatile unsigned long *)( 0x40600358 )          // 	UDC Data register - Endpoint W
#define BV_UDCDRX		(volatile unsigned long *)( 0x4060035C )          // 	UDC Data register - Endpoint X
#define BV_UDCCRA		(volatile unsigned long *)( 0x40600404 )          // 	UDC Configuration register - Endpoint A
#define BV_UDCCRB		(volatile unsigned long *)( 0x40600408 )          // 	UDC Configuration register - Endpoint B
#define BV_UDCCRC		(volatile unsigned long *)( 0x4060040C )          // 	UDC Configuration register - Endpoint C
#define BV_UDCCRD		(volatile unsigned long *)( 0x40600410 )          // 	UDC Configuration register - Endpoint D
#define BV_UDCCRE		(volatile unsigned long *)( 0x40600414 )          // 	UDC Configuration register - Endpoint E
#define BV_UDCCRF		(volatile unsigned long *)( 0x40600418 )          // 	UDC Configuration register - Endpoint F
#define BV_UDCCRG		(volatile unsigned long *)( 0x4060041C )          // 	UDC Configuration register - Endpoint G
#define BV_UDCCRH		(volatile unsigned long *)( 0x40600420 )          // 	UDC Configuration register - Endpoint H
#define BV_UDCCRI		(volatile unsigned long *)( 0x40600424 )          // 	UDC Configuration register - Endpoint I
#define BV_UDCCRJ		(volatile unsigned long *)( 0x40600428 )          // 	UDC Configuration register - Endpoint J
#define BV_UDCCRK		(volatile unsigned long *)( 0x4060042C )          // 	UDC Configuration register - Endpoint K
#define BV_UDCCRL		(volatile unsigned long *)( 0x40600430 )          // 	UDC Configuration register - Endpoint L
#define BV_UDCCRM		(volatile unsigned long *)( 0x40600434 )          // 	UDC Configuration register - Endpoint M
#define BV_UDCCRN		(volatile unsigned long *)( 0x40600438 )          // 	UDC Configuration register - Endpoint N
#define BV_UDCCRP		(volatile unsigned long *)( 0x4060043C )          // 	UDC Configuration register - Endpoint P
#define BV_UDCCRQ		(volatile unsigned long *)( 0x40600440 )          // 	UDC Configuration register - Endpoint Q
#define BV_UDCCRR		(volatile unsigned long *)( 0x40600444 )          // 	UDC Configuration register - Endpoint R
#define BV_UDCCRS		(volatile unsigned long *)( 0x40600448 )          // 	UDC Configuration register - Endpoint S
#define BV_UDCCRT		(volatile unsigned long *)( 0x4060044C )          // 	UDC Configuration register - Endpoint T
#define BV_UDCCRU		(volatile unsigned long *)( 0x40600450 )          // 	UDC Configuration register - Endpoint U
#define BV_UDCCRV		(volatile unsigned long *)( 0x40600454 )          // 	UDC Configuration register - Endpoint V
#define BV_UDCCRW		(volatile unsigned long *)( 0x40600458 )          // 	UDC Configuration register - Endpoint W
#define BV_UDCCRX		(volatile unsigned long *)( 0x4060045C )          // 	UDC Configuration register - Endpoint X
 // STUART control register					
#define BV_ST_BASE		(volatile unsigned long *)( 0x40700000 )          // 	
#define BV_ST_DLL		(volatile unsigned long *)( 0x40700000 )          // 	Divisor Latch Reg. low byte (read/write)
#define BV_ST_RBR		(volatile unsigned long *)( 0x40700000 )          // 	Receive Buffer register (read only) 
#define BV_ST_THR		(volatile unsigned long *)( 0x40700000 )          // 	Transmit Holding register (write only) 
#define BV_ST_DLH		(volatile unsigned long *)( 0x40700004 )          // 	Divisor Latch Reg. high byte (read/write)
#define BV_ST_IER		(volatile unsigned long *)( 0x40700004 )          // 	Interrupt Enable register (read/write)  
#define BV_ST_FCR		(volatile unsigned long *)( 0x40700008 )          // 	FIFO Control register (write only) 
#define BV_ST_IIR		(volatile unsigned long *)( 0x40700008 )          // 	Interrupt ID register (read only) 
#define BV_ST_LCR		(volatile unsigned long *)( 0x4070000C )          // 	Line Control register (read/write)  
#define BV_ST_MCR		(volatile unsigned long *)( 0x40700010 )          // 	Modem Control register (read/write)  
#define BV_ST_LSR		(volatile unsigned long *)( 0x40700014 )          // 	Line Status register (read only) 
#define BV_ST_MSR		(volatile unsigned long *)( 0x40700018 )          // 	Reserved     
#define BV_ST_SPR		(volatile unsigned long *)( 0x4070001C )          // 	Scratch Pad register (read/write)  
#define BV_ST_ISR		(volatile unsigned long *)( 0x40700020 )          // 	Slow Infrared Select register (read/write) 
#define BV_ST_FOR		(volatile unsigned long *)( 0x40700024 )          // 	FIFO Occupancy register (read only) 
#define BV_ST_ABR		(volatile unsigned long *)( 0x40700028 )          // 	Autobaud Control register (read/write)   
#define BV_ST_ACR		(volatile unsigned long *)( 0x4070002C )          // 	Autobaud Count register   
 // FIR IrDA					
#define BV_ICCR0		(volatile unsigned long *)( 0x40800000 )          // 	ICP control register 0  
#define BV_ICP_BASE    	(volatile unsigned long *)( 0x40800000 )          // 	
#define BV_ICCR1		(volatile unsigned long *)( 0x40800004 )          // 	ICP control register 1  
#define BV_ICCR2		(volatile unsigned long *)( 0x40800008 )          // 	ICP control register 2  
#define BV_ICDR			(volatile unsigned long *)( 0x4080000C )          // 	ICP data register   
#define BV_ICSR0		(volatile unsigned long *)( 0x40800014 )          // 	ICP status register 0       
#define BV_ICSR1		(volatile unsigned long *)( 0x40800018 )          // 	ICP status register 1       
#define BV_ICFOR		(volatile unsigned long *)( 0x4080001C )          // 	ICP FIFO Occupancy Status Reg. 
 // RTC Control registers					
#define BV_RCNR			(volatile unsigned long *)( 0x40900000 )          // 	RTC Counter register  
#define BV_RTC_BASE    	(volatile unsigned long *)( 0x40900000 )          // 	
#define BV_RTAR			(volatile unsigned long *)( 0x40900004 )          // 	RTC Alarm register  
#define BV_RTSR			(volatile unsigned long *)( 0x40900008 )          // 	RTC Status register  
#define BV_RTTR			(volatile unsigned long *)( 0x4090000C )          // 	RTC Timer Trim register 
#define BV_RDCR			(volatile unsigned long *)( 0x40900010 )          // 	RTC Day Counter register 
#define BV_RYCR			(volatile unsigned long *)( 0x40900014 )          // 	RTC Year Counter register            
#define BV_RDAR1		(volatile unsigned long *)( 0x40900018 )          // 	RTC Day Alarm register 1
#define BV_RYAR1		(volatile unsigned long *)( 0x4090001C )          // 	RTC Year Alarm register 1           
#define BV_RDAR2		(volatile unsigned long *)( 0x40900020 )          // 	RTC Day Alarm register 2
#define BV_RYAR2		(volatile unsigned long *)( 0x40900024 )          // 	RTC Year Alarm register 2           
#define BV_SWCR			(volatile unsigned long *)( 0x40900028 )          // 	Stopwatch Counter register    
#define BV_SWAR1		(volatile unsigned long *)( 0x4090002C )          // 	Stopwatch Alarm register1   
#define BV_SWAR2		(volatile unsigned long *)( 0x40900030 )          // 	Stopwatch Alarm register2    
#define BV_RTCPICR		(volatile unsigned long *)( 0x40900034 )          // 	Periodic Interrupt Counter register  
#define BV_PIAR			(volatile unsigned long *)( 0x40900038 )          // 	Periodic Interrupt Alarm register    
 // Timer Control registers					
#define BV_TIM_BASE    	(volatile unsigned long *)( 0x40A00000 )          // 	
#define BV_OSMR0		(volatile unsigned long *)( 0x40A00000 )          // 	OS Timer Match registers 0
#define BV_OSMR1		(volatile unsigned long *)( 0x40A00004 )          // 	OS Timer Match registers 1
#define BV_OSMR2		(volatile unsigned long *)( 0x40A00008 )          // 	OS Timer Match registers 2
#define BV_OSMR3		(volatile unsigned long *)( 0x40A0000C )          // 	OS Timer Match registers 3
#define BV_OSCR0		(volatile unsigned long *)( 0x40A00010 )          // 	OS Timer Counter register 0    
#define BV_OSSR			(volatile unsigned long *)( 0x40A00014 )          // 	OS Timer Status register (used for all counters)
#define BV_OWER			(volatile unsigned long *)( 0x40A00018 )          // 	OS Timer Watchdog Enable register   
#define BV_OIER			(volatile unsigned long *)( 0x40A0001C )          // 	OS Timer Interrupt Enable register (used for all counters)
#define BV_OSCR4		(volatile unsigned long *)( 0x40A00040 )          // 	OS Timer Counter registers 4
#define BV_OSCR5		(volatile unsigned long *)( 0x40A00044 )          // 	OS Timer Counter registers 5
#define BV_OSCR6		(volatile unsigned long *)( 0x40A00048 )          // 	OS Timer Counter registers 6
#define BV_OSCR7		(volatile unsigned long *)( 0x40A0004C )          // 	OS Timer Counter registers 7
#define BV_OSCR8		(volatile unsigned long *)( 0x40A00050 )          // 	OS Timer Counter registers 8
#define BV_OSCR9		(volatile unsigned long *)( 0x40A00054 )          // 	OS Timer Counter registers 9
#define BV_OSCR10		(volatile unsigned long *)( 0x40A00058 )          // 	OS Timer Counter registers 10
#define BV_OSCR11		(volatile unsigned long *)( 0x40A0005C )          // 	OS Timer Counter registers 11
#define BV_OSMR4		(volatile unsigned long *)( 0x40A00080 )          // 	OS Timer Match registers 4
#define BV_OSMR5		(volatile unsigned long *)( 0x40A00084 )          // 	OS Timer Match registers 5
#define BV_OSMR6		(volatile unsigned long *)( 0x40A00088 )          // 	OS Timer Match registers 6
#define BV_OSMR7		(volatile unsigned long *)( 0x40A0008C )          // 	OS Timer Match registers 7
#define BV_OSMR8		(volatile unsigned long *)( 0x40A00090 )          // 	OS Timer Match registers 8
#define BV_OSMR9		(volatile unsigned long *)( 0x40A00094 )          // 	OS Timer Match registers 9
#define BV_OSMR10		(volatile unsigned long *)( 0x40A00098 )          // 	OS Timer Match registers 10
#define BV_OSMR11		(volatile unsigned long *)( 0x40A0009C )          // 	OS Timer Match registers 11
#define BV_OMCR4		(volatile unsigned long *)( 0x40A000C0 )          // 	OS Match Control registers 4
#define BV_OMCR5		(volatile unsigned long *)( 0x40A000C4 )          // 	OS Match Control registers 5
#define BV_OMCR6		(volatile unsigned long *)( 0x40A000C8 )          // 	OS Match Control registers 6
#define BV_OMCR7		(volatile unsigned long *)( 0x40A000CC )          // 	OS Match Control registers 7
#define BV_OMCR8		(volatile unsigned long *)( 0x40A000D0 )          // 	OS Match Control registers 8
#define BV_OMCR9		(volatile unsigned long *)( 0x40A000D4 )          // 	OS Match Control registers 9
#define BV_OMCR10		(volatile unsigned long *)( 0x40A000D8 )          // 	OS Match Control registers 10
#define BV_OMCR11		(volatile unsigned long *)( 0x40A000DC )          // 	OS Match Control registers 11
 // PWM 0 & 1 Control Registers					
#define BV_PWM_BASE    	(volatile unsigned long *)( 0x40B00000 )          // 	
#define BV_PWMCR0		(volatile unsigned long *)( 0x40B00000 )          // 	PWM 0 Control register   
#define BV_PWMDCR0		(volatile unsigned long *)( 0x40B00004 )          // 	PWM 0 Duty Cycle register  
#define BV_PWMPCR0		(volatile unsigned long *)( 0x40B00008 )          // 	PWM 0 Period register 
#define BV_PWMCR2		(volatile unsigned long *)( 0x40B00010 )          // 	PWM 2 Control register   
#define BV_PWMDCR2		(volatile unsigned long *)( 0x40B00014 )          // 	PWM 2 Duty Cycle register
#define BV_PWMPCR2		(volatile unsigned long *)( 0x40B00018 )          // 	PWM 2 Period register 
#define BV_PWMCR1		(volatile unsigned long *)( 0x40C00000 )          // 	PWM 1 Control register   
#define BV_PWMDCR1		(volatile unsigned long *)( 0x40C00004 )          // 	PWM 1 Duty Cycle register
#define BV_PWMPCR1		(volatile unsigned long *)( 0x40C00008 )          // 	PWM 1 Period register 
#define BV_PWMCR3		(volatile unsigned long *)( 0x40C00010 )          // 	PWM 3 Control register   
#define BV_PWMDCR3		(volatile unsigned long *)( 0x40C00014 )          // 	PWM 3 Duty Cycle register
#define BV_PWMPCR3		(volatile unsigned long *)( 0x40C00018 )          // 	PWM 3 Period register 
 // Interrupt Control registers					
#define BV_INT_BASE    	(volatile unsigned long *)( 0x40D00000 )          // 	
#define BV_ICIP			(volatile unsigned long *)( 0x40D00000 )          // 	Read Only Interrupt Controller IRQ Pending register    
#define BV_ICMR			(volatile unsigned long *)( 0x40D00004 )          // 	Read/Write Interrupt Controller mask register      
#define BV_ICLR			(volatile unsigned long *)( 0x40D00008 )          // 	Read/Write Interrupt Controller Level register      
#define BV_ICFP			(volatile unsigned long *)( 0x40D0000C )          // 	Read Only Interrupt Controller FIQ Pending register    
#define BV_ICPR			(volatile unsigned long *)( 0x40D00010 )          // 	Read Only Interrupt Controller Pending register     
#define BV_ICCR			(volatile unsigned long *)( 0x40D00014 )          // 	Read/Write Interrupt Controller Control register 
#define BV_ICHP			(volatile unsigned long *)( 0x40D00018 )          // 	Read Interrupt Controller Highest Priority Register.     
#define BV_IPR0			(volatile unsigned long *)( 0x40D0001C )          // 	Interrupt Priority Registers 0
#define BV_IPR1			(volatile unsigned long *)( 0x40D00020 )          // 	Interrupt Priority Registers 1
#define BV_IPR2			(volatile unsigned long *)( 0x40D00024 )          // 	Interrupt Priority Registers 2
#define BV_IPR3			(volatile unsigned long *)( 0x40D00028 )          // 	Interrupt Priority Registers 3
#define BV_IPR4			(volatile unsigned long *)( 0x40D0002C )          // 	Interrupt Priority Registers 4
#define BV_IPR5			(volatile unsigned long *)( 0x40D00030 )          // 	Interrupt Priority Registers 5
#define BV_IPR6			(volatile unsigned long *)( 0x40D00034 )          // 	Interrupt Priority Registers 6
#define BV_IPR7			(volatile unsigned long *)( 0x40D00038 )          // 	Interrupt Priority Registers 7
#define BV_IPR8			(volatile unsigned long *)( 0x40D0003C )          // 	Interrupt Priority Registers 8
#define BV_IPR9			(volatile unsigned long *)( 0x40D00040 )          // 	Interrupt Priority Registers 9
#define BV_IPR10		(volatile unsigned long *)( 0x40D00044 )          // 	Interrupt Priority Registers 10
#define BV_IPR11		(volatile unsigned long *)( 0x40D00048 )          // 	Interrupt Priority Registers 11
#define BV_IPR12		(volatile unsigned long *)( 0x40D0004C )          // 	Interrupt Priority Registers 12
#define BV_IPR13		(volatile unsigned long *)( 0x40D00050 )          // 	Interrupt Priority Registers 13
#define BV_IPR14		(volatile unsigned long *)( 0x40D00054 )          // 	Interrupt Priority Registers 14
#define BV_IPR15		(volatile unsigned long *)( 0x40D00058 )          // 	Interrupt Priority Registers 15
#define BV_IPR16		(volatile unsigned long *)( 0x40D0005C )          // 	Interrupt Priority Registers 16
#define BV_IPR17		(volatile unsigned long *)( 0x40D00060 )          // 	Interrupt Priority Registers 17
#define BV_IPR18		(volatile unsigned long *)( 0x40D00064 )          // 	Interrupt Priority Registers 18
#define BV_IPR19		(volatile unsigned long *)( 0x40D00068 )          // 	Interrupt Priority Registers 19
#define BV_IPR20		(volatile unsigned long *)( 0x40D0006C )          // 	Interrupt Priority Registers 20
#define BV_IPR21		(volatile unsigned long *)( 0x40D00070 )          // 	Interrupt Priority Registers 21
#define BV_IPR22		(volatile unsigned long *)( 0x40D00074 )          // 	Interrupt Priority Registers 22
#define BV_IPR23		(volatile unsigned long *)( 0x40D00078 )          // 	Interrupt Priority Registers 23
#define BV_IPR24		(volatile unsigned long *)( 0x40D0007C )          // 	Interrupt Priority Registers 24
#define BV_IPR25		(volatile unsigned long *)( 0x40D00080 )          // 	Interrupt Priority Registers 25
#define BV_IPR26		(volatile unsigned long *)( 0x40D00084 )          // 	Interrupt Priority Registers 26
#define BV_IPR27		(volatile unsigned long *)( 0x40D00088 )          // 	Interrupt Priority Registers 27
#define BV_IPR28		(volatile unsigned long *)( 0x40D0008C )          // 	Interrupt Priority Registers 28
#define BV_IPR29		(volatile unsigned long *)( 0x40D00090 )          // 	Interrupt Priority Registers 29
#define BV_IPR30		(volatile unsigned long *)( 0x40D00094 )          // 	Interrupt Priority Registers 30
#define BV_IPR31		(volatile unsigned long *)( 0x40D00098 )          // 	Interrupt Priority Registers 31
 // GPIO Control registers					
#define BV_GPIO_BASE   	(volatile unsigned long *)( 0x40E00000 )          // 	
#define BV_GPLR0		(volatile unsigned long *)( 0x40E00000 )          // 	GPIO Pin-Level register GPIO[31:0]   
#define BV_GPLR1		(volatile unsigned long *)( 0x40E00004 )          // 	GPIO Pin-Level register GPIO[63:32]  
#define BV_GPLR2		(volatile unsigned long *)( 0x40E00008 )          // 	GPIO Pin-Level register GPIO[95:64]  
#define BV_GPDR0		(volatile unsigned long *)( 0x40E0000C )          // 	GPIO Pin Direction register GPIO[31:0]  
#define BV_GPDR1		(volatile unsigned long *)( 0x40E00010 )          // 	GPIO Pin Direction register GPIO[63:32]  
#define BV_GPDR2		(volatile unsigned long *)( 0x40E00014 )          // 	GPIO Pin Direction register GPIO[127:96]  
#define BV_GPSR0		(volatile unsigned long *)( 0x40E00018 )          // 	GPIO Pin Output Set register GPIO[31:0]
#define BV_GPSR1		(volatile unsigned long *)( 0x40E0001C )          // 	GPIO Pin Output Set register GPIO[63:32]
#define BV_GPSR2		(volatile unsigned long *)( 0x40E00020 )          // 	GPIO Pin Output Set register GPIO[95:64]
#define BV_GPCR0		(volatile unsigned long *)( 0x40E00024 )          // 	GPIO Pin Output Clear register GPIO[31:0] 
#define BV_GPCR1		(volatile unsigned long *)( 0x40E00028 )          // 	GPIO Pin Output Clear register GPIO [63:32]
#define BV_GPCR2		(volatile unsigned long *)( 0x40E0002C )          // 	GPIO pin Output Clear register GPIO [95:64]
#define BV_GRER0		(volatile unsigned long *)( 0x40E00030 )          // 	GPIO Rising-Edge Detect Enable register GPIO[31:0]
#define BV_GRER1		(volatile unsigned long *)( 0x40E00034 )          // 	GPIO Rising-Edge Detect Enable register GPIO[63:32]
#define BV_GRER2		(volatile unsigned long *)( 0x40E00038 )          // 	GPIO Rising-Edge Detect Enable register GPIO[95:64]
#define BV_GFER0		(volatile unsigned long *)( 0x40E0003C )          // 	GPIO Falling-Edge Detect Enable register GPIO[31:0] 
#define BV_GFER1		(volatile unsigned long *)( 0x40E00040 )          // 	GPIO Falling-Edge Detect Enable register GPIO[63:32] 
#define BV_GFER2		(volatile unsigned long *)( 0x40E00044 )          // 	GPIO Falling-Edge Detect Enable register GPIO[95:64] 
#define BV_GEDR0		(volatile unsigned long *)( 0x40E00048 )          // 	GPIO Edge Detect Status register GPIO[31:0] 
#define BV_GEDR1		(volatile unsigned long *)( 0x40E0004C )          // 	GPIO Edge Detect Status register GPIO[63:32] 
#define BV_GEDR2		(volatile unsigned long *)( 0x40E00050 )          // 	GPIO Edge Detect Status register GPIO[95:64] 
#define BV_GAFR0_L		(volatile unsigned long *)( 0x40E00054 )          // 	GPIO Alternate Function Register 0 _ L
#define BV_GAFR0_U		(volatile unsigned long *)( 0x40E00058 )          // 	GPIO Alternate Function Register 0 _ U
#define BV_GAFR1_L		(volatile unsigned long *)( 0x40E0005C )          // 	GPIO Alternate Function Register 1 _ L
#define BV_GAFR1_U		(volatile unsigned long *)( 0x40E00060 )          // 	GPIO Alternate Function Register 1 _ U
#define BV_GAFR2_L		(volatile unsigned long *)( 0x40E00064 )          // 	GPIO Alternate Function Register 2 _ L
#define BV_GAFR2_U		(volatile unsigned long *)( 0x40E00068 )          // 	GPIO Alternate Function Register 2 _ U
#define BV_GAFR3_L		(volatile unsigned long *)( 0x40E0006C )          // 	GPIO Alternate Function Register 3 _ L
#define BV_GAFR3_U		(volatile unsigned long *)( 0x40E00070 )          // 	GPIO Alternate Function Register 3 _ U
#define BV_GPLR3		(volatile unsigned long *)( 0x40E00100 )          // 	GPIO Pin-Level Registers 3
#define BV_GPDR3		(volatile unsigned long *)( 0x40E0010C )          // 	GPIO Pin Direction Registers 3
#define BV_GPSR3		(volatile unsigned long *)( 0x40E00118 )          // 	GPIO Pin Output Set Registers 3
#define BV_GPCR3		(volatile unsigned long *)( 0x40E00124 )          // 	Pin Output Clear Registers 3
#define BV_GRER3		(volatile unsigned long *)( 0x40E00130 )          // 	GPIO Rising-Edge Detect-Enable Registers 3
#define BV_GFER3		(volatile unsigned long *)( 0x40E0013C )          // 	GPIO Falling-Edge Detect-Enable Registers 3
#define BV_GEDR3		(volatile unsigned long *)( 0x40E00148 )          // 	GPIO Edge Detect Status Register 3
 // Power Manager Control registers					
#define BV_PM_BASE     	(volatile unsigned long *)( 0x40F00000 )          // 	
#define BV_PMCR			(volatile unsigned long *)( 0x40F00000 )          // 	Power Manager Control register  
#define BV_PSSR			(volatile unsigned long *)( 0x40F00004 )          // 	Power Manager Sleep Status register  
#define BV_PSPR			(volatile unsigned long *)( 0x40F00008 )          // 	Power Manager Scratch Pad register  
#define BV_PWER			(volatile unsigned long *)( 0x40F0000C )          // 	Power Manager Wake-up Enable register  
#define BV_PRER			(volatile unsigned long *)( 0x40F00010 )          // 	Power Manager GPIO Rising-edge Detect Enable register
#define BV_PFER			(volatile unsigned long *)( 0x40F00014 )          // 	Power Manager GPIO Falling-edge Detect Enable register 
#define BV_PEDR			(volatile unsigned long *)( 0x40F00018 )          // 	Power Manager GPIO Edge Detect Status register 
#define BV_PCFR			(volatile unsigned long *)( 0x40F0001C )          // 	Power Manager General Configuration register   
#define BV_PGSR0		(volatile unsigned long *)( 0x40F00020 )          // 	Power Manager GPIO Sleep State register for GPIO[31-0]
#define BV_PGSR1		(volatile unsigned long *)( 0x40F00024 )          // 	Power Manager GPIO Sleep State register for GPIO[63-32]
#define BV_PGSR2		(volatile unsigned long *)( 0x40F00028 )          // 	Power Manager GPIO Sleep State register for GPIO[95-64]
#define BV_PGSR3		(volatile unsigned long *)( 0x40F0002C )          // 	Power Manager GPIO Sleep State register for GPIO[120-96]
#define BV_RCSR			(volatile unsigned long *)( 0x40F00030 )          // 	Reset Controller Status register 
#define BV_PSLR			(volatile unsigned long *)( 0x40F00034 )          // 	Power Manager Sleep Mode Configuration register 
#define BV_PSTR			(volatile unsigned long *)( 0x40F00038 )          // 	Power Manager Standby Mode Configuration register 
#define BV_PSNR			(volatile unsigned long *)( 0x40F0003C )          // 	Power Manager Sense Mode Configuration register 
#define BV_PVCR			(volatile unsigned long *)( 0x40F00040 )          // 	Power Manager Voltage Change Control register 
#define BV_PKWR			(volatile unsigned long *)( 0x40F00050 )          // 	Power Manager Wake-up Enable for Keyboard
#define BV_PKSR			(volatile unsigned long *)( 0x40F00054 )          // 	Power Manager Keyboard wakeup status Register
#define BV_PCMD0		(volatile unsigned long *)( 0x40F00080 )          // 	Power Manager I 2 C Command Register 0
#define BV_PCMD1		(volatile unsigned long *)( 0x40F00084 )          // 	Power Manager I 2 C Command Register 1
#define BV_PCMD2		(volatile unsigned long *)( 0x40F00088 )          // 	Power Manager I 2 C Command Register 2
#define BV_PCMD3		(volatile unsigned long *)( 0x40F0008C )          // 	Power Manager I 2 C Command Register 3
#define BV_PCMD4		(volatile unsigned long *)( 0x40F00090 )          // 	Power Manager I 2 C Command Register 4
#define BV_PCMD5		(volatile unsigned long *)( 0x40F00094 )          // 	Power Manager I 2 C Command Register 5
#define BV_PCMD6		(volatile unsigned long *)( 0x40F00098 )          // 	Power Manager I 2 C Command Register 6
#define BV_PCMD7		(volatile unsigned long *)( 0x40F0009C )          // 	Power Manager I 2 C Command Register 7
#define BV_PCMD8		(volatile unsigned long *)( 0x40F000A0 )          // 	Power Manager I 2 C Command Register 8
#define BV_PCMD9		(volatile unsigned long *)( 0x40F000A4 )          // 	Power Manager I 2 C Command Register 9
#define BV_PCMD10		(volatile unsigned long *)( 0x40F000A8 )          // 	Power Manager I 2 C Command Register 10
#define BV_PCMD11		(volatile unsigned long *)( 0x40F000AC )          // 	Power Manager I 2 C Command Register 11
#define BV_PCMD12		(volatile unsigned long *)( 0x40F000B0 )          // 	Power Manager I 2 C Command Register 12
#define BV_PCMD13		(volatile unsigned long *)( 0x40F000B4 )          // 	Power Manager I 2 C Command Register 13
#define BV_PCMD14		(volatile unsigned long *)( 0x40F000B8 )          // 	Power Manager I 2 C Command Register 14
#define BV_PCMD15		(volatile unsigned long *)( 0x40F000BC )          // 	Power Manager I 2 C Command Register 15
#define BV_PCMD16		(volatile unsigned long *)( 0x40F000C0 )          // 	Power Manager I 2 C Command Register 16
#define BV_PCMD17		(volatile unsigned long *)( 0x40F000C4 )          // 	Power Manager I 2 C Command Register 17
#define BV_PCMD18		(volatile unsigned long *)( 0x40F000C8 )          // 	Power Manager I 2 C Command Register 18
#define BV_PCMD19		(volatile unsigned long *)( 0x40F000D0 )          // 	Power Manager I 2 C Command Register 19
#define BV_PCMD20		(volatile unsigned long *)( 0x40F000D4 )          // 	Power Manager I 2 C Command Register 20
#define BV_PCMD21		(volatile unsigned long *)( 0x40F000D8 )          // 	Power Manager I 2 C Command Register 21
#define BV_PCMD22		(volatile unsigned long *)( 0x40F000DC )          // 	Power Manager I 2 C Command Register 22
#define BV_PCMD23		(volatile unsigned long *)( 0x40F000E0 )          // 	Power Manager I 2 C Command Register 23
#define BV_PCMD24		(volatile unsigned long *)( 0x40F000E0 )          // 	Power Manager I 2 C Command Register 24
#define BV_PCMD25		(volatile unsigned long *)( 0x40F000E4 )          // 	Power Manager I 2 C Command Register 25
#define BV_PCMD26		(volatile unsigned long *)( 0x40F000E8 )          // 	Power Manager I 2 C Command Register 26
#define BV_PCMD27		(volatile unsigned long *)( 0x40F000EC )          // 	Power Manager I 2 C Command Register 27
#define BV_PCMD28		(volatile unsigned long *)( 0x40F000F0 )          // 	Power Manager I 2 C Command Register 28
#define BV_PCMD29		(volatile unsigned long *)( 0x40F000F4 )          // 	Power Manager I 2 C Command Register 29
#define BV_PCMD30		(volatile unsigned long *)( 0x40F000F8 )          // 	Power Manager I 2 C Command Register 30
#define BV_PCMD31		(volatile unsigned long *)( 0x40F000FC )          // 	Power Manager I 2 C Command Register 31
#define BV_PIBMR		(volatile unsigned long *)( 0x40F00180 )          // 	Power Manager I2C Bus Monitor register
#define BV_PIDBR		(volatile unsigned long *)( 0x40F00188 )          // 	I2C Data Buffer register  
#define BV_PICR			(volatile unsigned long *)( 0x40F00190 )          // 	Power Manager I2C Control register 
#define BV_PISR			(volatile unsigned long *)( 0x40F00198 )          // 	Power Manager I2C Status register 
#define BV_PISAR		(volatile unsigned long *)( 0x40F001A0 )          // 	Power Manager I2C Slave Address register
 // SSP Control registers					
#define BV_SSP_BASE    	(volatile unsigned long *)( 0x41000000 )          // 	
#define BV_SSCR0_1		(volatile unsigned long *)( 0x41000000 )          // 	SSP1 Control register 0            
#define BV_SSCR1_1		(volatile unsigned long *)( 0x41000004 )          // 	SSP1 Control register 1            
#define BV_SSSR_1		(volatile unsigned long *)( 0x41000008 )          // 	SSP1 Status register    
#define BV_SSITR_1		(volatile unsigned long *)( 0x4100000C )          // 	SSP1 Interrupt Test register   
#define BV_SSDR_1		(volatile unsigned long *)( 0x41000010 )          // 	SSP1 Data Write Register/SSP1 Data Read register
#define BV_SSTO_1		(volatile unsigned long *)( 0x41000028 )          // 	SSP1 Time Out register   
#define BV_SSPSP_1		(volatile unsigned long *)( 0x4100002C )          // 	SSP1 Programmable Serial Protocol   
 // MMC - multimedia controller					
#define BV_MMC_BASE    	(volatile unsigned long *)( 0x41100000 )          // 	
#define BV_MMC_STRPCL	(volatile unsigned long *)( 0x41100000 )          // 	Control to start and stop MMC/SD clock
#define BV_MMC_STAT		(volatile unsigned long *)( 0x41100004 )          // 	MMC/SD status register (read only)  
#define BV_MMC_CLKRT   	(volatile unsigned long *)( 0x41100008 )          // 	MMC/SD clock rate    
#define BV_MMC_SPI		(volatile unsigned long *)( 0x4110000C )          // 	SPI mode control bits   
#define BV_MMC_CMDAT_0	(volatile unsigned long *)( 0x41100010 )          // 	Command/response/data sequence control    
#define BV_MMC_RESTO	(volatile unsigned long *)( 0x41100014 )          // 	Expected response time out   
#define BV_MMC_RDTO		(volatile unsigned long *)( 0x41100018 )          // 	Expected data read time out  
#define BV_MMC_BLKLEN	(volatile unsigned long *)( 0x4110001C )          // 	Block length of data transaction  
#define BV_MMC_NUMBLK	(volatile unsigned long *)( 0x41100020 )          // 	Number of blocks  for block mode
#define BV_MMC_PRTBUF	(volatile unsigned long *)( 0x41100024 )          // 	Partial MMC_TXFIFO FIFO written   
#define BV_MMC_I_MASK	(volatile unsigned long *)( 0x41100028 )          // 	Interrupt Mask     
#define BV_MMC_I_REG	(volatile unsigned long *)( 0x4110002C )          // 	Interrupt Register (read only)   
#define BV_MMC_CMD		(volatile unsigned long *)( 0x41100030 )          // 	Index of current command   
#define BV_MMC_ARGH		(volatile unsigned long *)( 0x41100034 )          // 	MSW part of the current command argument   
#define BV_MMC_ARGL		(volatile unsigned long *)( 0x41100038 )          // 	LSW part of the current command argument   
#define BV_MMC_RES		(volatile unsigned long *)( 0x4110003C )          // 	Response FIFO (read only)   
#define BV_MMC_RXFIFO_0	(volatile unsigned long *)( 0x41100040 )          // 	Receive FIFO (read only)   
#define BV_MMC_TXFIFO_0	(volatile unsigned long *)( 0x41100044 )          // 	Transmit FIFO (write only)   
#define BV_MMC_CMDAT_1	(volatile unsigned long *)( 0x41100110 )          // 	Command/response/data sequence control    
#define BV_MMC_RXFIFO_1	(volatile unsigned long *)( 0x41100140 )          // 	Receive FIFO (read only)   
#define BV_MMC_TXFIFO_1	(volatile unsigned long *)( 0x41100144 )          // 	Transmit FIFO (write only)   
 // Clocks Control Registers					
#define BV_CLK_BASE    	(volatile unsigned long *)( 0x41300000 )          // 	
#define BV_CCCR			(volatile unsigned long *)( 0x41300000 )          // 	Core Clock Configuration register 
#define BV_CKEN			(volatile unsigned long *)( 0x41300004 )          // 	Clock-Enable register   
#define BV_OSCC			(volatile unsigned long *)( 0x41300008 )          // 	Oscillator Configuration register      
#define BV_CCSR			(volatile unsigned long *)( 0x4130000C )          // 	Core Clock Status register 
#define BV_KPC			(volatile unsigned long *)( 0x41500000 )          // 	Keypad Interface Control register     
#define BV_KPDK			(volatile unsigned long *)( 0x41500008 )          // 	Keypad Interface Direct Key register    
#define BV_KPREC		(volatile unsigned long *)( 0x41500010 )          // 	Keypad Interface Rotary Encoder Count register   
#define BV_KPMK			(volatile unsigned long *)( 0x41500018 )          // 	Keypad Interface Matrix Key register    
#define BV_KPAS			(volatile unsigned long *)( 0x41500020 )          // 	Keypad Interface Automatic Scan register    
#define BV_KPASMKP0		(volatile unsigned long *)( 0x41500028 )          // 	Keypad Interface Automatic Scan Multiple Key Press register 0
#define BV_KPASMKP1		(volatile unsigned long *)( 0x41500030 )          // 	Keypad Interface Automatic Scan Multiple Key Press register 1
#define BV_KPASMKP2		(volatile unsigned long *)( 0x41500038 )          // 	Keypad Interface Automatic Scan Multiple Key Press register 2
#define BV_KPASMKP3		(volatile unsigned long *)( 0x41500040 )          // 	Keypad Interface Automatic Scan Multiple Key Press register 3
#define BV_KPKDI		(volatile unsigned long *)( 0x41500048 )          // 	Keypad Interface Key Debounce Interval register   
 // USIM Control registers					
#define BV_USIM_BASE   	(volatile unsigned long *)( 0x41600000 )          // 	
#define BV_RBR			(volatile unsigned long *)( 0x41600000 )          // 	Receive Buffer   
#define BV_THR			(volatile unsigned long *)( 0x41600004 )          // 	Transmit Holding     
#define BV_IER			(volatile unsigned long *)( 0x41600008 )          // 	Interrupt Enable         
#define BV_IIR			(volatile unsigned long *)( 0x4160000C )          // 	Interrupt Identification         
#define BV_FCR			(volatile unsigned long *)( 0x41600010 )          // 	FIFO Control     
#define BV_FSR			(volatile unsigned long *)( 0x41600014 )          // 	FIFO Status     
#define BV_ECR			(volatile unsigned long *)( 0x41600018 )          // 	Error Control     
#define BV_LCR			(volatile unsigned long *)( 0x4160001C )          // 	Line Control      
#define BV_USCCR		(volatile unsigned long *)( 0x41600020 )          // 	Card Control   
#define BV_LSR			(volatile unsigned long *)( 0x41600024 )          // 	Line Status      
#define BV_EGTR			(volatile unsigned long *)( 0x41600028 )          // 	Extra Guard Time    
#define BV_BGTR			(volatile unsigned long *)( 0x4160002C )          // 	Block Guard Time               
#define BV_TOR			(volatile unsigned long *)( 0x41600030 )          // 	Time Out     
#define BV_CLKR			(volatile unsigned long *)( 0x41600034 )          // 	Clock    
#define BV_DLR			(volatile unsigned long *)( 0x41600038 )          // 	Divisor Latch      
#define BV_FLR			(volatile unsigned long *)( 0x4160003C )          // 	Factor Latch     
#define BV_CWTR			(volatile unsigned long *)( 0x41600040 )          // 	Character Waiting Time     
#define BV_BWTR			(volatile unsigned long *)( 0x41600044 )          // 	Block Waiting Time  
 // SSP2 Control registers					
#define BV_SSP2_BASE    (volatile unsigned long *)( 0x41700000 )          // 	
#define BV_SSCR0_2		(volatile unsigned long *)( 0x41700000 )          // 	SSP2 Control register 0            
#define BV_SSCR1_2		(volatile unsigned long *)( 0x41700004 )          // 	SSP2 Control register 1            
#define BV_SSSR_2		(volatile unsigned long *)( 0x41700008 )          // 	SSP2 Status register    
#define BV_SSITR_2		(volatile unsigned long *)( 0x4170000C )          // 	SSP2 Interrupt Test register   
#define BV_SSDR_2		(volatile unsigned long *)( 0x41700010 )          // 	SSP2 Data Write Register/SSP2 Data Read register
#define BV_SSTO_2		(volatile unsigned long *)( 0x41700028 )          // 	SSP2 Time Out register   
#define BV_SSPSP_2		(volatile unsigned long *)( 0x4170002C )          // 	SSP2 Programmable Serial Protocol   
 // Memory Stick Control registers					
#define BV_MEMST_BASE   (volatile unsigned long *)( 0x41800000 )          // 	
#define BV_MSCMR		(volatile unsigned long *)( 0x41800000 )          // 	MSHC Command register    
#define BV_MSCRSR		(volatile unsigned long *)( 0x41800004 )          // 	MSHC Control and Status register  
#define BV_MSINT		(volatile unsigned long *)( 0x41800008 )          // 	MSHC Interrupt and Status   
#define BV_MSINTEN		(volatile unsigned long *)( 0x4180000C )          // 	MSHC Interrupt Enable    
#define BV_MSCR2		(volatile unsigned long *)( 0x41800010 )          // 	MSHC Control register 2   
#define BV_MSACD		(volatile unsigned long *)( 0x41800014 )          // 	MSHC ACD Command register   
#define BV_MSRXFIFO		(volatile unsigned long *)( 0x41800018 )          // 	MSHC Receive FIFO    
#define BV_MSTXFIFO		(volatile unsigned long *)( 0x4180001C )          // 	MSHC Transmit FIFO      
 // SSP3 Control registers					
#define BV_SSP3_BASE   	(volatile unsigned long *)( 0x41900000 )          // 	
#define BV_SSCR0_3		(volatile unsigned long *)( 0x41900000 )          // 	SSP3 Control register 0            
#define BV_SSCR1_3		(volatile unsigned long *)( 0x41900004 )          // 	SSP3 Control register 1            
#define BV_SSSR_3		(volatile unsigned long *)( 0x41900008 )          // 	SSP3 Status register    
#define BV_SSITR_3		(volatile unsigned long *)( 0x4190000C )          // 	SSP3 Interrupt Test register   
#define BV_SSDR_3		(volatile unsigned long *)( 0x41900010 )          // 	SSP3 Data Write Register/SSP3 Data Read register
#define BV_SSTO_3		(volatile unsigned long *)( 0x41900028 )          // 	SSP3 Time Out register   
#define BV_SSPSP_3		(volatile unsigned long *)( 0x4190002C )          // 	SSP3 Programmable Serial Protocol   
 // LCD Control registers					
#define BV_LCD_BASE    	(volatile unsigned long *)( 0x44000000 )          // 	
#define BV_LCCR0		(volatile unsigned long *)( 0x44000000 )          // 	LCD Controller Control register 0    
#define BV_LCCR1		(volatile unsigned long *)( 0x44000004 )          // 	LCD Controller Control register 1    
#define BV_LCCR2		(volatile unsigned long *)( 0x44000008 )          // 	LCD Controller Control register 2    
#define BV_LCCR3		(volatile unsigned long *)( 0x4400000C )          // 	LCD Controller Control register 3    
#define BV_LCCR4		(volatile unsigned long *)( 0x44000010 )          // 	LCD Controller Control register 4    
#define BV_LCCR5		(volatile unsigned long *)( 0x44000014 )          // 	LCD Controller Control register 5   
#define BV_FBR0			(volatile unsigned long *)( 0x44000020 )          // 	DMA channel 0 Frame Branch register 
#define BV_FBR1			(volatile unsigned long *)( 0x44000024 )          // 	DMA channel 1 Frame Branch register 
#define BV_FBR2			(volatile unsigned long *)( 0x44000028 )          // 	DMA channel 2 Frame Branch register 
#define BV_FBR3			(volatile unsigned long *)( 0x4400002C )          // 	DMA channel 3 Frame Branch register 
#define BV_FBR4			(volatile unsigned long *)( 0x44000030 )          // 	DMA channel 4 Frame Branch register 
#define BV_LCSR1		(volatile unsigned long *)( 0x44000034 )          // 	LCD Controller Status register 1   
#define BV_LCSR0		(volatile unsigned long *)( 0x44000038 )          // 	LCD Controller Status register 0   
#define BV_LIIDR		(volatile unsigned long *)( 0x4400003C )          // 	LCD controller Interrupt ID register   
#define BV_TRGBR		(volatile unsigned long *)( 0x44000040 )          // 	TMED RGB Seed register   
#define BV_TCR			(volatile unsigned long *)( 0x44000044 )          // 	TMED Control register    
#define BV_OVL1C1		(volatile unsigned long *)( 0x44000050 )          // 	Overlay 1 Control register 1   
#define BV_OVL1C2		(volatile unsigned long *)( 0x44000060 )          // 	Overlay 1 Control register 2   
#define BV_OVL2C1		(volatile unsigned long *)( 0x44000070 )          // 	Overlay 2 Control register 1   
#define BV_OVL2C2		(volatile unsigned long *)( 0x44000080 )          // 	Overlay 2 Control register 2   
#define BV_CCR 			(volatile unsigned long *)( 0x44000090 )          // 	Cursor Control register  
#define BV_CMDCR		(volatile unsigned long *)( 0x44000100 )          // 	Command Control register  
#define BV_PRSR			(volatile unsigned long *)( 0X44000104 )          // 	Panel Read Status Register   
#define BV_FBR5			(volatile unsigned long *)( 0x44000110 )          // 	DMA Channel 5 Frame Branch register 
#define BV_FBR6			(volatile unsigned long *)( 0x44000114 )          // 	DMA channel 6 Frame Branch register 
#define BV_FDADR0		(volatile unsigned long *)( 0x44000200 )          // 	DMA Channel 0 Frame Descriptor Address register
#define BV_FSADR0		(volatile unsigned long *)( 0x44000204 )          // 	DMA Channel 0 Frame Source Address register
#define BV_FIDR0		(volatile unsigned long *)( 0x44000208 )          // 	DMA Channel 0 Frame ID register 
#define BV_LDCMD0		(volatile unsigned long *)( 0x4400020C )          // 	DMA Channel 0 Command register   
#define BV_FDADR1		(volatile unsigned long *)( 0x44000210 )          // 	DMA Channel 1 Frame Descriptor Address register
#define BV_FSADR1		(volatile unsigned long *)( 0x44000214 )          // 	DMA Channel 1 Frame Source Address register
#define BV_FIDR1		(volatile unsigned long *)( 0x44000218 )          // 	DMA Channel 1 Frame ID register 
#define BV_LDCMD1		(volatile unsigned long *)( 0x4400021C )          // 	DMA Channel 1 Command register   
#define BV_FDADR2		(volatile unsigned long *)( 0x44000220 )          // 	DMA Channel 2 Frame Descriptor Address register
#define BV_FSADR2		(volatile unsigned long *)( 0x44000224 )          // 	DMA Channel 2 Frame Source Address register
#define BV_FIDR2		(volatile unsigned long *)( 0x44000228 )          // 	DMA Channel 2 Frame ID register 
#define BV_LDCMD2		(volatile unsigned long *)( 0x4400022C )          // 	DMA Channel 2 Command register   
#define BV_FDADR3		(volatile unsigned long *)( 0x44000230 )          // 	DMA Channel 3 Frame Descriptor Address register
#define BV_FSADR3		(volatile unsigned long *)( 0x44000234 )          // 	DMA Channel 3 Frame Source Address register
#define BV_FIDR3		(volatile unsigned long *)( 0x44000238 )          // 	DMA Channel 3 Frame ID register 
#define BV_LDCMD3		(volatile unsigned long *)( 0x4400023C )          // 	DMA Channel 3 Command register   
#define BV_FDADR4		(volatile unsigned long *)( 0x44000240 )          // 	DMA Channel 4 Frame Descriptor Address register
#define BV_FSADR4		(volatile unsigned long *)( 0x44000244 )          // 	DMA Channel 4 Frame Source Address register
#define BV_FIDR4		(volatile unsigned long *)( 0x44000248 )          // 	DMA Channel 4 Frame ID register 
#define BV_LDCMD4		(volatile unsigned long *)( 0x4400024C )          // 	DMA Channel 4 Command register   
#define BV_FDADR5		(volatile unsigned long *)( 0x44000250 )          // 	DMA Channel 5 Frame Descriptor Address register
#define BV_FSADR5		(volatile unsigned long *)( 0x44000254 )          // 	DMA Channel 5 Frame Source Address register
#define BV_FIDR5		(volatile unsigned long *)( 0x44000258 )          // 	DMA Channel 5 Frame ID register 
#define BV_LDCMD5		(volatile unsigned long *)( 0x4400025C )          // 	DMA Channel 5 Command register   
#define BV_FDADR6		(volatile unsigned long *)( 0x44000260 )          // 	DMA Channel 6 Frame Descriptor Address register
#define BV_FSADR6		(volatile unsigned long *)( 0x44000264 )          // 	DMA Channel 6 Frame Source Address register
#define BV_FIDR6		(volatile unsigned long *)( 0x44000268 )          // 	DMA Channel 6 Frame ID register 
#define BV_LDCMD6		(volatile unsigned long *)( 0x4400026C )          // 	DMA Channel 6 Command register   
 // Mem cont. control registers					
#define BV_MEMC_BASE   	(volatile unsigned long *)( 0x48000000 )          // 	
#define BV_MDCNFG		(volatile unsigned long *)( 0x48000000 )          // 	SDRAM Configuration register       
#define BV_MDREFR		(volatile unsigned long *)( 0x48000004 )          // 	SDRAM Refresh Control register      
#define BV_MSC0			(volatile unsigned long *)( 0x48000008 )          // 	Static Memory Control register 0  
#define BV_MSC1			(volatile unsigned long *)( 0x4800000C )          // 	Static Memory Control register 1  
#define BV_MSC2			(volatile unsigned long *)( 0x48000010 )          // 	Static Memory Control register 2  
#define BV_MECR			(volatile unsigned long *)( 0x48000014 )          // 	Expansion Memory (PCMCIA / Compact Flash) Bus Configuration register 
#define BV_SXCNFG		(volatile unsigned long *)( 0x4800001C )          // 	Synchronous Static Memory Control register  
#define BV_FLYCNFG		(volatile unsigned long *)( 0x48000020 )          // 	Fly by DMA DVAL[1:0] polarities  
#define BV_MCMEM0		(volatile unsigned long *)( 0x48000028 )          // 	Card interface Common Memory Space Socket 0 Timing Configuration 
#define BV_MCMEM1		(volatile unsigned long *)( 0x4800002C )          // 	Card interface Common Memory Space Socket 1 Timing Configuration 
#define BV_MCATT0		(volatile unsigned long *)( 0x48000030 )          // 	Card interface Attribute Space Socket 0 Timing Configuration
#define BV_MCATT1		(volatile unsigned long *)( 0x48000034 )          // 	Card interface Attribute Space Socket 1 Timing Configuration
#define BV_MCIO0		(volatile unsigned long *)( 0x48000038 )          // 	Card interface I/O Space Socket 0 Timing Configuration  
#define BV_MCIO1		(volatile unsigned long *)( 0x4800003C )          // 	Card interface I/O Space Socket 1 Timing Configuration  
#define BV_MDMRS		(volatile unsigned long *)( 0x48000040 )          // 	MRS value to be written to SDRAM   
#define BV_BOOT_DEF		(volatile unsigned long *)( 0x48000044 )          // 	Boot-time register. Contains BOOT_SEL and PKG_SEL values.           
#define BV_ARB_CNTL		(volatile unsigned long *)( 0x48000048 )          // 	Arbiter Control register. See the Internal Bus Arbiter chapter of this document for details on programming this register.
#define BV_BSCNTR0		(volatile unsigned long *)( 0x4800004C )          // 	Transistor Buffer Strengths for System Memory Output Buffers          
#define BV_BSCNTR1		(volatile unsigned long *)( 0x48000050 )          // 	Transistor Buffer Strengths for System Memory Output Buffers          
#define BV_LCDBSCNTR   	(volatile unsigned long *)( 0x48000054 )          // 	Transistor Buffer Strengths for LCD Controller Output Buffers
#define BV_MDMRSLP		(volatile unsigned long *)( 0x48000058 )          // 	Special Low Power MRS value to be written to SDRAM
#define BV_BSCNTR2		(volatile unsigned long *)( 0x4800005C )          // 	Transistor Buffer Strengths for System Memory Output Buffers          
#define BV_BSCNTR3		(volatile unsigned long *)( 0x48000060 )          // 	Transistor Buffer Strengths for System Memory Output Buffers          
 // USB Host control registers					
#define BV_USBH_BASE   	(volatile unsigned long *)( 0x4C000000 )          // 	
#define BV_UHCREV		(volatile unsigned long *)( 0x4C000000 )          // 	HCI Spec Revision   
#define BV_UHCHCON		(volatile unsigned long *)( 0x4C000004 )          // 	Control register  
#define BV_UHCCOMS		(volatile unsigned long *)( 0x4C000008 )          // 	Command Status  
#define BV_UHCINTS		(volatile unsigned long *)( 0x4C00000C )          // 	Interrupt Status  
#define BV_UHCINTE		(volatile unsigned long *)( 0x4C000010 )          // 	Interrupt Enable Control register
#define BV_UHCINTD		(volatile unsigned long *)( 0x4C000014 )          // 	Interrupt Disable Control register
#define BV_UHCHCCA		(volatile unsigned long *)( 0x4C000018 )          // 	Host controller Communication Area
#define BV_UHCPCED		(volatile unsigned long *)( 0x4C00001C )          // 	Period Current Endpoint Descriptor
#define BV_UHCCHED		(volatile unsigned long *)( 0x4C000020 )          // 	Control Head Endpoint Descriptor register 
#define BV_UHCCCED		(volatile unsigned long *)( 0x4C000024 )          // 	Control Current Endpoint Descriptor register 
#define BV_UHCBHED		(volatile unsigned long *)( 0x4C000028 )          // 	Bulk Head Endpoint Descriptor register 
#define BV_UHCBCED		(volatile unsigned long *)( 0x4C00002C )          // 	Bulk Current Endpoint Descriptor register 
#define BV_UHCDHEAD		(volatile unsigned long *)( 0x4C000030 )          // 	Done head register 
#define BV_UHCFMI		(volatile unsigned long *)( 0x4C000034 )          // 	Frame Interval register 
#define BV_UHCFMR		(volatile unsigned long *)( 0x4C000038 )          // 	Frame Remaining register 
#define BV_UHCFMN		(volatile unsigned long *)( 0x4C00003C )          // 	Frame Number register 
#define BV_UHCPERS		(volatile unsigned long *)( 0x4C000040 )          // 	Periodic Start register 
#define BV_UHCLST		(volatile unsigned long *)( 0x4C000044 )          // 	Low Speed Threshold register
#define BV_UHCRHDA		(volatile unsigned long *)( 0x4C000048 )          // 	Root Hub Descriptor A register 
#define BV_UHCRHDB		(volatile unsigned long *)( 0x4C00004C )          // 	Root Hub Descriptor B register 
#define BV_UHCRHS		(volatile unsigned long *)( 0x4C000050 )          // 	Root Hub Status register  
#define BV_UHCRHPS1		(volatile unsigned long *)( 0x4C000054 )          // 	Root Hub Port 1 Status register
#define BV_UHCRHPS2		(volatile unsigned long *)( 0x4C000058 )          // 	Root Hub Port 2 Status register
#define BV_UHCSTAT		(volatile unsigned long *)( 0x4C000060 )          // 	USB Host Status   
#define BV_UHCHR		(volatile unsigned long *)( 0x4C000064 )          // 	USB Host Reset 
#define BV_UHCHIE		(volatile unsigned long *)( 0x4C000068 )          // 	USB Host Interrupt Enable
#define BV_UHCHIT		(volatile unsigned long *)( 0x4C00006C )          // 	USB Host Interrupt Test
 // Internal SRAM control registers					
#define BV_SRAM_BASE    (volatile unsigned long *)( 0x58000000 )          // 	
#define BV_IMPMR		(volatile unsigned long *)( 0x58000000 )          // 	IM Power Management Control register      
#define BV_IMPSR		(volatile unsigned long *)( 0x58000008 )          // 	IM Power Management Status register      
